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数字式延迟
1、time delay───时间延迟; 时延; 延时; 落后；延时，延迟
2、flight delay───航班延误
3、digital───n.数字；键；adj.数字的；手指的
4、appreciable delay───明显延迟
5、delay───v.延期；（使）耽搁；推迟；n.延迟的时间；延期；延时；延迟器；n.(Delay)（美）德莱（人名）
6、delay to───延迟到
7、ambidexterity delay───双灵巧延迟
8、irritating delay───刺激性延迟
9、delay time───[电子]延迟时间，推迟时间；延迟时间，滞后时间，缓发时间; 时延
1、Finally, the MP3 decode frequency equalizer and some digital delay effects are implemented on SM350 platform.───最后在SM350平台上实现了MP3JieMa的频域均衡器和数字延时音效。
2、Digital Delay Compensates for Differences in Link Paths.───为不同链接路径提供数字延时补偿。
3、In this paper, the optimization method was used to design the interface circuit, and use VHDL description to design low voltage digital delay timer.───在电路设计过程中，对后级接口电路进行了最优化设计，采用VHDL描述的方式实现了低压数字延时电路模块的设计。
4、RN1406 Pinout: RCDs digital delay lines have been designed to provide precise tap delays with all the necessary drive and pick-off circuitry.───RN1406引脚说明：刚果民盟数字延迟线的设计提供所有必要的驱动器精确自来水延误和挑选过的电路。
5、Based on digital delay-locked loop, the mix signal technique is used to implement the digital delay locked loop with the resource control technique.───以数字延迟锁相环为基础，并采用数模混合技术，实现了带电源控制的数字延迟锁相环。
6、Design and realization of nanosecond digital delay and pulse generator───纳秒延时同步脉冲产生器的设计与实现
7、The Research of Digital Delay Signal Integrity in Laser Targeting───激光打靶数字延时信号完整性的研究
8、By the digital delay-locked loop (DLL) the timing precision of the display interface was improved.───利用数字延迟锁相环逻辑，提高了显示接口时序控制精度。
9、Digital Delay Technique and its Practice for Broadcast Signal───广播信号数字延时技术与实践
1、RN1406 Pinout: RCDs digital delay lines have been designed to provide precise tap delays with all the necessary drive and pick-off circuitry.
2、This paper proposes a new gate drive method for active clamped quasi resonant converters. Instead of a digital delay circuit, only a resistor and a diode are added to produce correct drive waveforms.
3、The best one is a digitally produced effect using a digital delay line having at least 16-bit resolution.
4、Based on digital delay-locked loop, the mix signal technique is used to implement the digital delay locked loop with the resource control technique.
5、In this paper, the optimization method was used to design the interface circuit, and use VHDL description to design low voltage digital delay timer.