大家都搜:
总线接口定时
1、user interface───用户界面
2、timing differences───时间性差异
3、forenoon timing───上午时间
4、abutment interface───桥台界面
5、solidity interface───固体界面
6、wronging timing───错误的时间
7、serial interface───串联接口;n.串行接口
8、communication interface───[通信][计]通信接口
9、timing chain───[仪]定时链
1、The system utilizes CPLD to realize logical and timing control between DSP and multi-channel ADC. The interface between DSP's HPI and PCI bus is employed to achieve high-speed data transmission.───该XiTong采用CPLD实现了DSP与多通道adc的逻辑和时序控制,通过DSP的HPI与PCI总线接口设计实现了采集数据的高速传输。
2、FSM model of target PCI bus interface controller is then provided based on PCI bus operation timing.───根据PCI总线Cao作时序,提出了从设备接口KongZhiQi的有限状态机模型。